Short channel junction field effect transistor
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United States of America Patent
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Sep 25, 1990
Issued Date -
N/A
app pub date -
Feb 20, 1990
filing date -
Jul 20, 1988
priority date (Note) -
Expired
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Abstract
A junction field effect transistor fabricated by a simplified process for incorporation into an integrated circuit including bipolar transistors is disclosed. The JFET comprises an isolated gate region of a first conductivity type with a surface on the integrated circuit and a buried layer beneath the surface to enhance conductivity. A pair of spaced-apart regions of a second conductivity type extend into the gate region form the surface but not into contact with the buried layer. A plurality of ion implanted subsurface channels of the second conductivity type extend between the pair of spaced-apart regions. Between each subsurface channel and the surface is an upper gate region of the first conductivity type, each of which has an enhanced dopant concentration compared with adjacent portions of the gate region. The upper gates are formed through the same mask as the subsurface channels for insuring optimal alignment of the gates with the channels and simplifying fabrication. The resulting JFET also has improved frequency response characteristics.
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