Pixel memory arrangement for information display system
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Aug 21, 1990
Grant Date -
N/A
app pub date -
Jan 5, 1988
filing date -
Jan 13, 1987
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A pixel data memory is provided for use with an information display system having a raster scan screen divided into a plurality of pixels each of which represents a separate area of the screen. The memory comprises a multiple-bit memory plane (13) capable of providing a plurality of separate bit locations each of which may correspond to a separate display pixel and arranged to store pixel data in the form of a plurality of multiple-bit words. The memory plane (13) comprises a number of memory chips each capable of storing a separate bit of each of the multiple-bit words. An address generator (10) is operable to generate the addresses of required individual bit locations in the memory plane. A number of separate control circuits (14) are provided, equal to the number of bits in each word. Each control circuit (14) is associated with a separate memory chip and is responsive to a generated address defining a bit location on that chip to access the pixel data identified by the bit at that location. The control circuits are operable in an asynchronous manner so as to allow pixel data to be written into a read out from a number of bit locations simultaneously.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully