Method for forming low resistance, sub-micrometer semiconductor gate structures
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United States of America Patent
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Jul 3, 1990
Grant Date -
N/A
app pub date -
Mar 6, 1984
filing date -
Mar 6, 1984
priority date (Note) -
Expired
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Abstract
A process for forming a T or Y gate structures on the surface of semiconductor device substrates is disclosed wherein the gate length is extremely small, and low resistance along the gate width using light field photolithographic processing techniques, and a positive photo-resist, which allows definition of areas of smaller dimension than conventional dark field photolithographic techniques.
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