Sampling-holding circuit with high sampling frequency
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United States of America Patent
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Jun 26, 1990
Grant Date -
N/A
app pub date -
Oct 2, 1987
filing date -
Oct 3, 1986
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An ultra-fast sample-and-hold circuit for the processing of analog signals comprises a diodes bridge: an input signal VE is applied to the input point and copied at the output point; the output signal is memorized in a capacitance. At the midpoints of the bridge, two current sources are applied. The voltages at the midpoints are servo-linked, in the hold mode, to the output voltage by means of a voltage follower and diodes mounted diagonally across the bridge, the two switches of the current sources being controlled by a signal clock signal. It is applied to signal processing chains in instrumentation, radar and telecommunications.
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