EEPROM memory cell with a single level of polysilicon programmable and erasable bit by bit
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United States of America Patent
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Jun 19, 1990
Grant Date -
N/A
app pub date -
Dec 22, 1987
filing date -
Dec 22, 1986
priority date (Note) -
Expired
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Abstract
The cell is formed of a selection transistor, a detection transistor and a tunnel condenser. The detection Transistor has its own control gate formed with an n.sup.+ diffusion which is closed and isolated from those of the other cells of the same memory.
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