Logic circuit having an error detection function
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United States of America Patent
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May 8, 1990
Grant Date -
N/A
app pub date -
May 12, 1983
filing date -
May 13, 1982
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A logic circuit has two pairs of input terminals to each of which is applied a pair of input signals opposite in phase and a pair of output terminals for deriving a pair of output signals corresponding to the logical states of the two pairs of input signals. The logic circuit is further provided with a holding circuit which is adapted to hold the output signals in the same logical state when a pair of input signal having the same phase are applied to the input terminals.
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