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Abstract

A circuit technique is presented for mixing current mode logic and emitter coupled logic in a manner which reduces active and passive component counts for performing recognized logic functions. The reduced counts permit greater circuit density while reducing power consumption in comparison to conventional emitter coupled logic circuitry. The mixing is also provided in a way for making all imputs and outputs compatible with conventional emitter coupled logic levels. Various logic circuits are illustrated to demonstrate the versatility of the technique. For example, a transparent high D-latch (FIG. 2), a D flip-flop with true output (FIG. 4), a two-to-one multiplex latch (FIG. 6), and other D flip-flops having set and reset inputs (FIG. 7), multiplex data inputs (FIG. 8), and Exclusive OR data inputs (FIG. 9) are circuits wherein the inventive technique is employed to advantage.

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