Complementary semiconductor memory device with pull-up and pull down
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United States of America Patent
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Oct 10, 1989
Grant Date -
N/A
app pub date -
Jun 13, 1986
filing date -
Jun 18, 1985
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A semiconductor memory device has first and second power terminals, a plurality of MOS transistors as memory cells, a plurality of word lines respectively connected to the gates of the MOS transistors, and a bit line connected to one end of the current path of each of the MOS transistors. The other end of the current path of each of the MOS transistors is selectively connected to either the first or second power terminal, in accordance with data to be stored.
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