Method and apparatus for testing EPROM type semiconductor devices during burn-in
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Oct 3, 1989
Issued Date -
N/A
app pub date -
Oct 17, 1988
filing date -
Jul 22, 1986
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An apparatus and a relative method which permit carrying out a complete cycle of functional tests and parametric measurements on EPROM type semiconductor devices during their permanence inside a burn-in chamber, thus greatly reducing the time necessary for testing and classifying the devices, besides ensuring a higher reliability. The system utilizes special 'intelligent' cards, i.e., provided with a card microprocessor which may be connected to a supervisory system's CPU directing the test and classification process of the devices.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully