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Abstract

A video graphics memory storage reduction technique combines a frame buffer memory system with a run length encoded memory system by providing a luminance/chrominance decoder/multiplexer to convert output digital data segments from a memory into color components in lieu of using a color look up table. The digital data segments also are input to a detector and a switch, with the luminance portion being compared with a predetermined fixed value outside the valid luminance value range and the chrominance portion being passed through the switch in lieu of a constant when the luminance matches the detector value. A run length encoder logic circuit uses the output of the switch to generate access commands for the memory, and the detector causes the luminance/chrominance decoder to hold the last color until the next digital data segment is accessed by the logic circuit.

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First Claim