Bipolar input circuit for CMOS flash analog to digital converter
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United States of America Patent
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Sep 26, 1989
Grant Date -
N/A
app pub date -
Mar 3, 1988
filing date -
Mar 3, 1988
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A CMOS analog to digital flash converter cell includes an input for receiving an analog signal to be converted to a digital value, a predetermined connection to a resistance ladder for providing a reference voltage, an output, CMOS comparator/inverter stage having drain connections commonly connected to the output, a level shift capacitor connected to input gate connections of the comparator/inverter stage, and three bi-phase clocked CMOS switches: a first switch for connecting the reference voltage to one side of the level shift capacitor during a first phase of a clock period; a second switch for connecting the output to the input gate connections on the other side of the level shift capacitor during the first phase of the clock period, and a third switch for connecting the input voltage to the one side of the level shift capacitor during a second phase of the clock period. The new input circuit includes a first bipolar transistor having a base connection to the predetermined resistance ladder connection and having an output node connected to the first CMOS switch and a second bipolar transistor having a base connection connected to the input and having an output node connected to the third CMOS switch.
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