Break points system in a software monitor where entry address of break point routing equals op code of call instruction
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United States of America Patent
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Sep 12, 1989
Grant Date -
N/A
app pub date -
Apr 1, 1987
filing date -
Oct 27, 1986
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
In a system based upon a microprocessor, the instruction set of which includes only one trap instruction, a software monitor is provided in which the user can define and monitor software break points without using trap instructions, thereby leaving the entire instruction set available to a user to execute, develop, or debug software containing trap instructions. To accomplish this result, software break points are defined at desired addresses by replacing user instructions at such addresses with call instructions that call a monitor routine which handles software break points. The argument of the call instruction is made equal to its op code. The portion of the monitor that handles software break points is entered at an address equal to the op code of the call instruction inserted at the break point address. This procedure avoids overwriting errors that otherwise would occur when software break points are defined at consecutive locations of the user program. This is particularly relevant where a user may wish to single step through a user program executing one user instruction at a time using a 'single-step command'.
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