Electrically programmable non-volatile memory having sequentially deactivated write circuits
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United States of America Patent
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Aug 22, 1989
Grant Date -
N/A
app pub date -
Oct 20, 1987
filing date -
Oct 20, 1986
priority date (Note) -
Expired
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Abstract
An electrically programmable non-volatile memory includes a matrix of memory cells accessible by rows and columns, write and read circuits which apply potentials, representing the programmed datum or representing the read command, to the rows and columns. The memory also includes a device which controls the interconnection of the write and read circuits with the memory cells, wherein N memory cells are programmed simultaneously, N being greater than 1, each memory cell setting up a current surge when it is programmed at '1'. The memory also includes a device for deactivating, one by one, the write circuits corresponding to the N memory cells where there is a change-over from a programming mode to a read mode, and a structure to short-circuit the deactivation device at the change-over to the programming mode.
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