Frequency synthesizer suited for use in a time division multiplexing system
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United States of America Patent
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Jul 4, 1989
Issued Date -
N/A
app pub date -
Apr 7, 1988
filing date -
May 29, 1985
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Expired
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Abstract
A frequency synthesizer includes a 1/N divider for generating an address clock signal the frequency of which is 1/N times the frequency of an input signal, a memory for storing samples in a unit sine and cosine wave which is read out in response to the address clock signal to produce a frequency deviation signal, and a quadrant modulator responsive to both of the input signal and frequency deviation signal for producing an output signal the frequency of which is the difference between the input signal and frequency deviation signal. The frequency of the frequency deviation signal is varied by digitally changing N to modify the frequency of the output signal while maintaining the continuousness of the output signal phase.
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