Means for reducing signal propagation losses in very large scale integrated circuits
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United States of America Patent
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May 23, 1989
Issued Date -
N/A
app pub date -
Jul 8, 1988
filing date -
Dec 13, 1983
priority date (Note) -
Expired
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Abstract
A method and means for reducing signal propagation losses in very large scale integrated circuits is provided comprising a ground plane located adjacent to, but insulated from, a conductive signal layer overlying an active region in a semiconductor substrate. While, the ground plane is preferrably disposed between the signal layer and the substrate, it may be disposed above the signal layer. Moreover, two or more signal layers may be employed and sandwiched between a pair of ground planes.
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