Importance

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Abstract

A process control system has a timer circuit which fixes operational periods by issuing an instruction for starting each of a plurality of time periods in such a manner that the computation of control blocks will occur during periods of fixed duration. A periodic operation selection circuit selects control blocks to be computed within each time period in response to an instruction from the timer circuit. Control blocks selected by the periodic operation selection circuit and an instruction for completion of the computation of control blocks for each time period are stacked in an operation instruction circuit, which issues an instruction for consecutively executing the operation of the control blocks and an instruction for effecting an idle operation after completion of the operation of control blocks for each time period. When an instruction for starting an ensuing time period is issued from the timer circuit at a time when computation of a control block has not been completed within a predetermined time period, an operation completion determining circuit issues an instruction for starting the computation of the ensuing time period beginning with computation of the remaining control blocks in the predetermined time period and an instruction for stacking control blocks in the ensuing time period in the operation instruction circuit by means of the periodic operation selection circuit.

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First Claim