Digital delay circuit
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United States of America Patent
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Apr 25, 1989
Issued Date -
N/A
app pub date -
Nov 20, 1987
filing date -
Jun 13, 1986
priority date (Note) -
Expired
status (Latency Note)
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Abstract
For controlling the firing of an electroacoustic transducer used in providing an ultrasound image of a fetus under examination, a programmable digital delay circuit includes a clock generator whose output is supplied to a delay line so as to provide a plurality of waveforms shifted in time from one another and from the waveform generated by the clock generator. Depending on the delay desired prior to firing the transducer, one of the five waveforms may be not be inverted and thereafter used for triggering a counter whose output switches logic gates for enabling a buffer and pulse shaper to fire the transducer.
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