System of selective purging of address translation in computer memories
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Apr 11, 1989
Issued Date -
N/A
app pub date -
Aug 15, 1988
filing date -
May 7, 1985
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
When data is subject to relocation in the physical memory of a processing system employing a virtual memory architecture, execution of programs can be greatly improved through the use of a validation code generator, which assigns a code to each virtual-to-physical address translation prior to its entry in the address translation system. Whenever a page in memory is replaced or the buffer is purged for memory management purposes, the code generator proceeds to another code and assigns this new code to subsequent entries.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully