Digital exchange switch element and network
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Apr 11, 1989
Grant Date -
N/A
app pub date -
Feb 6, 1987
filing date -
Feb 6, 1987
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method and apparatus for a multi-channel space-division switching network capable of providing dedicated line connections from a large number of inlets to a large number of outlets for either analog or digital communication. A flexible and highly modular space-division switching network is constructed using a basic digital exchange circuit element. This element is a basic building block which can be inexpensively manufactured and wired together in large numbers to form space-division switching networks which can be expanded or contracted according to a user's requirements and volume of communications. The building block element is constructed using line receiver/driver buffers as an interface to adapt a wide variety of communications media to the internal electronic media of the space-division switching network. The element also includes bus driver/receivers which are used to transfer communication information to and from intrastage and interstage buses. Input communication information is placed on these communication buses and N-line to l-line multiplexers remove the communication information from the buses and transfer it to the communication destination. In a multi-stage design, a plurality of I/O buses, transfer buses and crossover buses are used in conjuction with a plurality of N-line to l-line multiplexers to select a nonblocking communication path from a requesting port to a destination port. Control of the multiplexers and data transfer throughout the communication network is accomplished by means of distributive processing in microprocessors placed at various stages throughout the network. The microprocessors communicate with one another to forward communications requests by means of a serial communications bus.

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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
QLOGIC CORPORATION | 26650 ALISO VIEJO ALISO VIEJO CA 92656 |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Anderson, Terry M | Minnetonka, MN | 4 | 378 |
Cornelius, Robert S | Edina, MN | 6 | 222 |
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Maintenance Fees
Fee | Large entity fee | small entity fee | micro entity fee | due date |
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Fee | Large entity fee | small entity fee | micro entity fee |
---|---|---|---|
Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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