Error disbursing format for digital information and method for organizing same
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United States of America Patent
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Jan 31, 1989
Grant Date -
N/A
app pub date -
Apr 29, 1987
filing date -
Apr 29, 1987
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Multiple stage interleaving through a memory matrix is utilized to separate adjacently disposed bits from bytes of digital information, in a reorganized bit stream. At least two stages of interleaving are required for the preferred embodiments of the invention which achieves a bit separation distance equal to the bit capacity of a plurality of either the matrix columns or rows, with that plurality being the number of adjacently disposed bits in each byte of digital information.
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