Computer memory system
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United States of America Patent
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Jan 3, 1989
Grant Date -
N/A
app pub date -
Mar 17, 1987
filing date -
Mar 17, 1987
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An improved computer memory system based on a novel four transistor memory cell and an improved address decoder circuit is disclosed. The memory cell can be fabricated using currently available logic fabrication processes and requires a silicon area less than that required by prior art static memory cells. The improved decoder can be fabricated in significantly less silicon area than existing NOR gate decoder arrays and is faster than existing NOR gate decoder arrays.
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