Data processor with loop circuit for delaying execution of a program loop control instruction
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United States of America Patent
Stats
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Dec 20, 1988
Issued Date -
N/A
app pub date -
May 1, 1987
filing date -
Dec 30, 1983
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A data processor for executing a program of instructions stored in a program memory controlled by a program counter. To execute a loop control instruction, calling for repeated execution N times of a sequence of 'i' instructions, the processor includes a loop circuit having an instruction counter which counts execution of the instructions in the loop sequence and produces an end-of-sequence signal upon each completion of the loop, a register which refreshes the program counter with the address of the first instruction in the loop in response to each end-of-sequence signal, and a loop counter which counts the number of completions of the loop and delivers a signal indicating the end of the loop portion of the entire program and enabling the program counter to continue on with the rest of the program. The delay in loop execution permits initializing of registers in the data processor so as to permit pipeline execution of the loop instruction.
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