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Abstract

A simulation system for visual signal processing circuits is presented which provides a detailed, pixel level analysis of the timing while actually performing the simulation at the frame level. Input to the circuit is the form of images captured by a video camera. The processing of a frame of image data by each circuit component is simulated and the resulting frames of image data are stored until they are no longer needed by other components. The output of the simulated circuit is displayed on a monitor. The timing of the circuit is analyzed for distinct groups of components which must operate in synchronism. Scaling factors are calculated for each net in the group from the incremental scaling rate of each component and the connectivity of the circuit. The scaling factors indicate the relative rate at which value pixels arrive at each net. The time at which a reference pixel arrives at each net is then computed to ensure that corresponding pixels arrive together at components with multiple inputs. When the circuit is simulated, the start time and finish time for each component is determined, giving the execution time for the circuit. Output data from a group is made available to other groups when the simulated time is advanced to the finish time for the group. Proper timing is thus assured without performing the simulation at the pixel level.

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First Claim