Arithmetic logic system using the output of a first alu to control the operation of a second alu
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United States of America Patent
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Jun 28, 1988
Grant Date -
N/A
app pub date -
Oct 7, 1985
filing date -
Oct 7, 1985
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An arithmetic logic system for performing a variety of arithmetic and logical functions on pixel input streams such as averaging down the input image stream, computation of absolute values, and signed or unsigned, clipped or unclipped, addition, subtraction and multiplication. The arithmetic logic system has a first arithmetic logic unit connected to a plurality of input signals. A second arithmetic logic unit is coupled to the first arithmetic logic unit and operates on the output of the first arithmetic logic unit. A control unit is coupled to the first and second arithmetic logic units and controls the operation of the second arithmetic logic unit based on the output of the first arithmetic logic unit.
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