High integrity digital processor architecture
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United States of America Patent
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Jun 14, 1988
Grant Date -
N/A
app pub date -
Mar 31, 1986
filing date -
Mar 31, 1986
priority date (Note) -
Expired
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Abstract
A digital data processor architecture immune from digital computer upset including a non-volatile random access memory for storing past and present values of state variables. An index counter is utilized to offset the store and retrieve instruction base addresses to effect the multiple storage of the state variables in the non-volatile memory. A monitor detects disruptions in data processing and vectors the processor to a reinitialization and restart routine in which the past values of the state variables are utilized.
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