Semiconductor chip power supply monitor circuit arrangement
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Dec 22, 1987
Grant Date -
N/A
app pub date -
Aug 30, 1985
filing date -
Aug 30, 1985
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A circuit arrangement (13) for monitoring power supplies in N-channel CMOS devices, comprising elements for sampling of a bandgap voltage reference quantity (41), comparing the reference quantity to a monitored power supply voltage level (38), and compensating (49) for the offset voltage produced in the comparator element (31) conducting the comparison.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully