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Abstract

A set value of a frequency setting register is accumulated upon each occurrence of a clock signal, and a waveform memory is read out by using the accumulated value as an address. In the waveform memory, amplitude data of one cycle of the waveform of a burst signal to be generated are stored at fixed phase intervals. The output read out of the waveform memory is converted into an analog signal. A wave-number counter counts the number of times the amplitude data of one cycle is read out of the waveform memory and, when having counted by a preset number of waves, yields a wave-number counting end signal. After the occurrence of the wave-number counting end signal, a phase counter counts clock signals, and, when the count value of the phase counter reaches a value corresponding to a preset end phase, the generation of the burst signal is stopped.

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First Claim