Read/write control circuit

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United States of America Patent

PATENT NO 4697101
SERIAL NO

06645392

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Abstract

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A semiconductor integrated circuit which has a CMOS inverter formed of p-and n-channel MOSFETs, and a D-type n-channel MOSFET coupled at the gate to the output terminal of the CMOS inverter, having one end coupled to a high voltage terminal and the other end coupled to the drain of the p-channel MOSFET.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBA A CORP OF JAPAN72 HORIKAWA-CHO SAIWAI-KU KAWASAKI-SHI
TOSHIBA MICRO-COMPUTER ENGINEERING CORPORATION A CORP OF JAPAN2-11 HIGASIDA-CHO KAWASAKI-KU KAWASAKI-SHI
TOSBAC COMPUTER SYSTEM CO LTD A CORP OF JAPAN1-13-9 SHIBUYA SHIBUYA-KU TOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Asano, Masamichi Tokyo, JP 97 2317
Iwahashi, Hiroshi Yokohama, JP 124 2550
Minagawa, Hidenobu Kawasaki, JP 10 207
Momodomi, Masaki Yokohama, JP 58 2245
Narita, Akira Kawasaki, JP 12 239
Suzuki, Kazuto Kawasaki, JP 10 88

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