Low active-power address buffer
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United States of America Patent
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Jun 30, 1987
Grant Date -
N/A
app pub date -
Jun 20, 1985
filing date -
Jun 20, 1985
priority date (Note) -
Expired
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Abstract
A buffer circuit accepting TTL input levels and generating logic-level signals incorporates means to reduce the power consumption in the circuit in the active phase as well as the inactive phase, without imposing additional restrictions on the user.
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