Pattern generator
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United States of America Patent
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Jun 2, 1987
Grant Date -
N/A
app pub date -
Feb 15, 1985
filing date -
Feb 15, 1984
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
In a main pattern memory are stored an increment command pattern and an enable control pattern in addition to test patterns. The main pattern memory is read out with an address from an address control circuit. The increment command pattern thus read out of the main pattern memory instructs incrementing of an address pointer, and a partial pattern memory is read out according to the contents of the address pointer. In accordance with the enable control pattern read out of the main pattern memory, a gate circuit is controlled to open, through which the output of the partial pattern memory is passed, and bits of the passed output are each ORed, by an OR circuit, with the corresponding bits of the test pattern read out of the main pattern memory, providing the ORed output as a test pattern.
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