Output circuit for a semiconductor memory device
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United States of America Patent
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Aug 5, 1986
Grant Date -
N/A
app pub date -
Sep 2, 1983
filing date -
Sep 3, 1982
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An output circuit for a semiconductor memory device including a preset circuit connected to a data output terminal and adapted to set a potential on the data output terminal to a potential between a potential of a first potential supply terminal and a potential of a second supply terminal during a preparative period for read preceding a data readout from a memory cell whereby the potential level on the data output terminal reaches a 'H' level or a 'L' level. Thus, the output circuit with high speed readout operation and with high reliability by means of being free from the instability caused by an output noise can be obtained.
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