Nonvolatile electrically alterable memory
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United States of America Patent
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Jul 8, 1986
Grant Date -
N/A
app pub date -
May 14, 1985
filing date -
May 14, 1985
priority date (Note) -
Expired
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Abstract
A compact, floating gate, nonvolatile, electrically alterable memory device is fabricated with three layers of polysilicon. In a nonvolatile memory array, each cell is electrically isolated from other cells to eliminate data disturb conditions in nonaddressed cells of the memory array. The memory cell and array is described in a first embodiment as including four electrode layers, one of which being formed as a substrate coupling electrode. A second embodiment includes a three electrode layer device wherein the need for the substrate coupling electrode is eliminated.
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