Test pattern generating apparatus
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United States of America Patent
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Apr 29, 1986
Grant Date -
N/A
app pub date -
Nov 14, 1983
filing date -
Nov 15, 1982
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A test pattern generator includes means for reading out a plurality of memories non-successively while outputting the test patterns stored identically in the addresses of the memories, such as for sequentially repeating the test patterns that are provided to a logic circuit being tested. The sequence of test patterns is determined by a series of instructions which are accessed by a program counter, and the instructions can cause a jump in the counting of the program counter, for instance to repeat addresses of the memories for repeating a desired sequence of test patterns a predetermined number of times. The timing of the addressing of the memories for the reading out of the test patterns can be faster than the timing for writing the test patterns into the memories for storage.
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