Circuit arrangement for the protection of data in volatile write-read memories (RAM)
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United States of America Patent
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-
Apr 1, 1986
Grant Date -
N/A
app pub date -
Jan 26, 1983
filing date -
Jan 28, 1982
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A circuit arrangement for the permanent protection of data in volatile write-read memories (RAM) such as the type used for the storage of tariff data and variable control counter data in a taximeter. The inventive circuit arrangement provides a signal line between the microcomputer system and a volatile write-read memory (RAM) via a control circuit. By means of this arrangement, in the sealed state of the taximeter, a permanently effective suppression of write instructions can be set. Thus, the data stored there can no longer be affected by any interference signals from the microcomputer system. The supply of operating voltage of the RAM is secured by means of a circuit which includes a buffer battery and a buffer capacitor.
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