Digital phase locking arrangement for synchronizing digital span data
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United States of America Patent
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-
Feb 4, 1986
Grant Date -
N/A
app pub date -
Jun 22, 1983
filing date -
Jun 22, 1983
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
In a PCM telecommunications switching system, an arrangement for deriving a clock signal from incoming PCM data of a digital span is shown. This derived clock signal is synchronized and continuously locked to the incoming PCM data of the digital span. The present digital phase locking arrangement cyclically adjusts the derive clock signal so that on the average synchronism is maintained.
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