Method of forming localized epitaxy and devices formed therein
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United States of America Patent
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Jan 28, 1986
Issued Date -
N/A
app pub date -
May 13, 1983
filing date -
May 13, 1983
priority date (Note) -
Expired
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Abstract
An integrated circuit structure for isolating circuit structures in closely packed integrated circuits, and a method for making the same. The isolation structure includes a semiconductor body having a surface, an insulatory layer on the surface having an aperture and an offset adjacent to the aperture, the aperture and offset being filled with epitaxial semiconductor material, at least a portion of the epitaxial material being single crystal semiconductor, said structure being used for the fabrication of standard semiconductor devices. The method uses conventional processing techniques that require a minimum of additional cost over prior art, and yet provide a high degree of device isolation and density.
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