Remote data link address sequencer and a memory arrangement for accessing and storing digital data
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jan 14, 1986
Grant Date -
N/A
app pub date -
Dec 22, 1983
filing date -
Dec 22, 1983
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
An address sequencer and memory arrangement is shown for transferring data in the form of message bytes to and from a plurality of digital data links. The address sequencer and memory arrangement includes a memory circuit having a plurality of memory location areas associated with each of the plurality of digital data links. A counter circuit connected to the memory circuit is loaded with a preset count by a link processor complex. The counter increments and outputs to the memory circuit addresses which sequentially access each of the memory location areas, transferring each message byte to a data link output buffer for transmission over a respective one of the plurality of digital data links. Alternatively, the counter addresses sequentially each memory location area transferring a message byte to each memory location area from each of the plurality of digital data links via a data link input buffer.
First Claim
Other Claims data not available
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
- 8 Citation Count
- H04Q Class
- 0 % this patent is cited more than
- 39 Age