Floating point digital differential analyzer

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United States of America Patent

PATENT NO 4563749
SERIAL NO

06449662

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Abstract

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In a floating point digital differential analyzer, multiplication and division of constants are carried out by an adder which truncates a summation SDY.sub.i of l secondary increments calculated by ##EQU1## into a third increment having an n-bit mantissa including a sign bit, and an integrator for carrying out an integration of R.sub.i :=R.sub.i-1 +Y.sub.i .multidot..DELTA.X.sub.i -.DELTA.Z.sub.i irrespective of a value of a first increment .DELTA.X.sub.i to generate .DELTA.Z.sub.i from R.sub.i.

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Patent Owner(s)

Patent OwnerAddress
HITACHI LTDTOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Endo, Takeyuki Kodaira, JP 7 66
Ide, Jushi Mito, JP 19 476
Kodama, Kazuyuki Hachioji, JP 13 134
Yabuuchi, Shigeru Tokyo, JP 7 243

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