Clocked self booting logical "EXCLUSIVE OR" circuit
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United States of America Patent
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-
Dec 31, 1985
Grant Date -
N/A
app pub date -
Jan 6, 1983
filing date -
Jan 6, 1983
priority date (Note) -
Expired
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Abstract
A solid state logical 'EXCLUSIVE OR' circuit for implementation in NMOS circuitry utilizes existing non-overlapping clock pulses for self-booting circuit conditioning, enabling ultrafast propagation times and minimal power drain during circuit operation, whereof row driver circuit design concepts are utilized and silicon area is minimized and two, non-overlapping, low impedance pulses, normally present in the circuit environment are utilized.
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