Decoder lockout defeat circuit
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United States of America Patent
Stats
-
Dec 10, 1985
Grant Date -
N/A
app pub date -
Oct 3, 1983
filing date -
Oct 3, 1983
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A suppressed sync television decoder includes a phase locked horizontal oscillator for controlling operation of a suppressed sync detector which supplies a circuit for restoring suppressed sync in a television signal. The restored sync is coupled to the phase locked oscillator and to a first four bit counter. A second four bit counter is supplied with the horizontal oscillator signal and inhibits counting in both counters when it counts 16. A reset signal corresponding to the end of the vertical interval initializes both counters. If the number of sync pulses counted by the second counter is less than 16, an error signal is produced. Thirty-two error signals result in generation of a defeat pulse to unlock the oscillator.
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