Resistance flash butt welding process monitor
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United States of America Patent
Stats
-
Nov 20, 1984
Grant Date -
N/A
app pub date -
Jan 15, 1982
filing date -
Jan 15, 1982
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The apparatus comprises a current transformer coupled to the welding tranrmer primary and connected with an analog transmitter of the welding current and with a digital transmitter of the duration of short-circuits in the welding circuit, having a memory element at the output. The apparatus further includes an analog voltage transmitter coupled to the welding transformer primary, digital transmitters of the slip of the workpieces being weld-joined with memory elements at the outputs, installed in the machine clamps, a digital transmitter of the offset of the rod of the servo-operated control valve with respect to its housing, having a memory element at the output, an analog transmitter of the displacement of the machine's movable column, an analog transmitter of the fusion rate, as well as a device for digital recording of welding process variables, electrically connected to a first output of the programming device and including a commutator of analog signals, an analog-to-digital converter, an interface, a microprocessor, and a digital printer, all coupled in series. According to the invention, the apparatus incorporates a set of flip-flops whose number equals that of the control commands, univibrators, and an OR-gate whose inputs are electrically coupled via the corresponding univibrators to outputs of the flip-flops and to a second output of the programming device and whose output is coupled to the triggering input of the interface, and two encoders. The recording device additionally comprises an OR-gate which accomplishes an electric coupling of the outputs of the analog-to-digital converter and encoders with the information input of the interface. The inputs of one encoder are coupled to the outputs of the digital transmitters, the inputs of the other encoder are coupled to a third output of the programming device, and the control inputs of both encoders and of the commutator of analog signals are coupled to the address bus of the interface.

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- 15 United States
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- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
Patent Owner | Address | |
---|---|---|
INSTITUT ELEKTROSVARKI IMENI E O PATONA AKADEMII NAUK UKRAINSKOI SSR USSR KIEV ULITSA BOZHENKO 11 | Not Provided |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Dovgodko, Evgeny I | Kiev, SU | 1 | 2 |
Grabchev, Boris L | Kiev, SU | 3 | 20 |
Kobylin, Alexandr M | Kiev, SU | 1 | 2 |
Krivonos, Vadim P | Kiev, SU | 5 | 28 |
Podola, Nikolai V | Kiev, SU | 4 | 25 |
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Maintenance Fees
Fee | Large entity fee | small entity fee | micro entity fee | due date |
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Fee | Large entity fee | small entity fee | micro entity fee |
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Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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