Circuit for reducing offset voltage drift in differential amplifiers
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United States of America Patent
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-
Oct 30, 1984
Grant Date -
N/A
app pub date -
Aug 25, 1982
filing date -
Aug 25, 1982
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A differential pair of transistors is coupled to a current source and an active load to provide an output voltage which has little offset voltage drift with respect to input voltage variation. Biasing means establish a predetermined current which is supplied to the differential pair and which is varied by control means in response to the input signal to reduce offset voltage drift.
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