Self-aligning process for placing a barrier metal over the source and drain regions of MOS semiconductors
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United States of America Patent
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Oct 23, 1984
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N/A
app pub date -
Nov 30, 1983
filing date -
Nov 30, 1983
priority date (Note) -
Expired
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Abstract
A self-aligning process for adding a barrier metal to the source and drain regions of metal oxide semiconductors is presented. An oxide sidewall spacer is first formed on the sides of upwardly protruding gate regions. A barrier metal is then added to the entire surface, followed by adding a layer of resist material. The resist material is added in layers with each layer spun until the top surface is nearly smooth. An anisotropical etch is done to remove the resist everywhere except over the source and drain regions, which regions are depressed due to the upwardly protruding gate region and a surrounding upwardly protruding insulating material. The exposed barrier metal is etched away and the remaining resist is stripped, leaving a layer of barrier metal only over the source and drain regions.
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