Process for making transistors with doped oxide densification
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United States of America Patent
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Oct 16, 1984
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N/A
app pub date -
Feb 1, 1983
filing date -
Feb 1, 1983
priority date (Note) -
Expired
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Abstract
A method of fabricating CMOS integrated circuits including the ordered steps of: depositing a layer of phosphorus doped silicon oxide; heating the oxide layer at a temperature and duration sufficient to reflow and densify it; forming contact apertures in the oxide layer for exposing source and drain regions of transistors; and cleaning the wafer in an etchant solution for rounding off sharp edges on the oxide layer prior to contact metallization. In a preferred embodiment, all steps between forming contact apertures and through metallization are formed at a temperature that is lower than the temperature that will cause flow of the oxide layer.
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