Importance

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Abstract

A multistage counter 3, 5, 7, 10 normally counts seconds pulses from a frequency divider 2. Counters 5 and 7 are units and tens minutes counters and are set by shifting a counter 21 by button B to provide a '1' on output 21d. When a button A is then held down the seconds pulses pass through gates 17 and 22 and count the units counter 5 up to the numeral 0. A flip-flop 19, 26 is then set to disable gate 22 and enable gate 23 so that the units counter stays at the numeral 0 and the tens counter advances to the desired value, when button A is released, which resets the flip-flop. Button A is pressed again to count the units counter from the numeral 0 to the desired value. The invention in one embodiment simplifies the setting of a digital watch and reduces the time (number of pulses) needed to preset the units and tens of minutes counters. The invention can be extended to more than two counters and used for counters other than in clocks and watches.

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First Claim