Pulse delay compensation for frequency synthesizer
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Oct 11, 1983
Grant Date -
N/A
app pub date -
Mar 20, 1981
filing date -
Mar 20, 1981
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A pulse delay compensator for use with a divide counter dividing a frequency signal by a first positive integer or a second positive integer to produce a divided frequency signal and with the first and second positive integers a fixed number of integers apart and including controlling the divide counter to divide the frequency signal by the first or second positive integers, repetitively summing a fixed fractional number with each divide and with the control of the divide counter in accordance with each overflow produced by the repetitive summing, and producing pulse delay compensation for the divided frequency signal in accordance with the repetitive summing to equalize the pulse period between adjacent pulses in the divided frequency signal.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully