Method of manufacturing semiconductor integrated circuit devices
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United States of America Patent
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-
Oct 11, 1983
Grant Date -
N/A
app pub date -
Dec 2, 1981
filing date -
Dec 12, 1980
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Spaced recesses are formed in a surface of a low impurity concentration P type single-crystal substrate by using a mask. A P type impurity is diffused at a high concentration into an entire surface of the substrate including the recesses to form a P type diffused layer, and an N type layer is epitaxially grown on the P type diffused layer. Then, mask layers are formed on bottom surfaces of the recesses in the epitaxially grown N type layer and this N type layer is anisotropically etched by using the mask layers to form island regions in the recesses. After removing the mask layers, N type diffused layers are formed to cover the island regions. An insulating film (SiO.sub.2) acting to isolate completed transistor elements is formed on the P and N type diffused layers, and a polycrystalline silicon layer acting as a support of a dielectrically isolated integrated circuit device is formed on the insulating film. Then, the rear surface of the single-crystal silicon substrate is ground off to expose the insulating film. MOS or bipolar type transistor elements are formed in the island regions to obtain a dielectrically isolated semiconductor integrated device.
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