Branch predictor using random access memory
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United States of America Patent
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Jan 25, 1983
Grant Date -
N/A
app pub date -
Oct 21, 1980
filing date -
Oct 21, 1980
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A system is provided for predicting in advance the result of a conditional branch instruction in a computer system. The system includes a hash mechanism, a random access memory, an address buffer, a branch outcome result receiving means and a counter buffer. The hash mechanism and memory use the input branch instruction address to produce a count which in effect is a way of weighting recent branch history to predict the branch decision. The counts are stored in the random access memory (RAM). The random access memory is addressed by the hashed branch instruction address to produce the system result.
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