Semiconductor structure and method

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United States of America Patent

PATENT NO 4318118
SERIAL NO

06128860

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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A semiconductor structure including a body of semiconductor material with selected surface areas of at least one surface of said body of semiconductor material including an oxide layer containing impurities characterizing a predetermined conductivity type, an inset region of said predetermined conductivity type under each of said areas formed by diffusion of impurities from said oxide layer and a silicon nitride layer covering said predetermined oxide areas and the remaining surface areas of said at least one surface of said body of semiconductor material. The method of forming inset regions of predetermined conductivity type in a body of semiconductor material which includes the steps of forming on predetermined areas of a surface of said body a doped oxide layer, forming a silicon nitride layer on said surface to cover said areas and the remainder of the surface of said body and heating said body to cause the impurities in said oxide layer to diffuse inwardly into the body to form inset regions under said areas while said silicon nitride layer prevents out-gasing of impurities from the oxide areas.

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Patent Owner(s)

Patent OwnerAddress
MICRO POWER SYSTEMS INCSANTA CLARA CA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hall, John H Saratoga, CA 51 749

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