CMOS-bipolar EAROM
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United States of America Patent
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-
Mar 4, 1980
Grant Date -
N/A
app pub date -
Oct 20, 1978
filing date -
Oct 20, 1978
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A memory array having NPN emitter followers with B V.sub.EB >20 volts and high threshold electrically alterable devices in each cell, CMOS row and column address buffer drivers and CMOS outputs buffers. The row address buffer includes an emitter follower as the output stage in a Darlington configuration with the array emitter follow capable of carrying high current and voltages for the programming and read modes.
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